Implementing a One Address CPU in Logisim (Record no. 38823)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 03519nam a2200349 i 4500 |
| 001 - CONTROL NUMBER | |
| control field | OTLid0000593 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | MnU |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20241120064017.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS--GENERAL INFORMATION | |
| fixed length control field | m o d s |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 180907s2016 mnu o 0 0 eng d |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | MnU |
| Language of cataloging | eng |
| Transcribing agency | MnU |
| 050 #4 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | QA76 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Kann, Charles W. |
| Relator term | author |
| 245 00 - TITLE STATEMENT | |
| Title | Implementing a One Address CPU in Logisim |
| Statement of responsibility, etc | Charles Kann |
| 264 #2 - | |
| -- | Minneapolis, MN |
| -- | Open Textbook Library |
| 264 #1 - | |
| -- | [Place of publication not identified] |
| -- | A.T. Still University |
| -- | [2016] |
| 264 #4 - | |
| -- | ©2016. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 online resource |
| 336 ## - | |
| -- | text |
| -- | txt |
| -- | rdacontent |
| 337 ## - | |
| -- | computer |
| -- | c |
| -- | rdamedia |
| 338 ## - | |
| -- | online resource |
| -- | cr |
| -- | rdacarrier |
| 490 0# - SERIES STATEMENT | |
| Series statement | Open textbook library. |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | 1. Introduction -- 1.1 Basic Components in a CPU -- 1.2 Comparisons of Computer Architectures -- 1.3 Von Neumann and Harvard Architectures -- 2. Assembly Language -- 2.1 What is Assembly Language -- 2.2 Assembly Language Caveats -- 2.3 Assembler Directives -- 2.4 Data types -- 2.5 Designing an Assembly Language -- 2.6 Assembler Programs -- 3. Machine Code -- 3.1 Overview of the machine code instruction format -- 4. Assembler program -- 4.1 Running a program on the One-Address CPU -- 5. CPU implementation -- 5.1 The sign extend unit -- 5.2 The ALU -- 5.3 The Control Unit (CU) -- 5.4 The CPU -- 5.5 Implementing the CU |
| 520 0# - SUMMARY, ETC. | |
| Summary, etc | Most computer users have an incorrect, but useful, cognitive metaphor for computers in which the user says (or types or clicks) something and a mystical, almost intelligent or magical, behavior happens. It is not a stretch to describe computer users as believing computers follow the laws of magic, where some magic incantation is entered, and the computer responds with an expected, but magical, behavior. This magic computer does not actually exist. In reality computer are machines, and every action a computer performs reduces to a set of mechanical operations. In fact the first complete definition of a working computer was a mechanical machine designed by Charles Babbage in 1834, and would have run on steam power. Probably the biggest success of Computer Science (CS) in the 20th century was the development of abstractions that hide the mechanical nature of computers. The fact that average people use computers without ever considering that they are mechanistic is a triumph of CS designers. This purpose of this monograph is to break the abstract understanding of a computer, and to explain a computer's behavior in completely in mechanistic terms. It will deal specifically with the Central Processing Unit (CPU) of the computer, as this is where the magic happens. All other parts of a computer can be seen as just providing information for the CPU to operate on. This monograph will deal with a specific type of CPU, a one-address CPU, and will explain this CPU using only standard gates, specifically AND, OR, NOT, NAND and XOR gates, and 4 basic Integrated Circuits (ICs), the Decoder, Multiplexer, Adder, and Flip Flop. All of these gates and components can be described as mechanical transformations of input data to output data, and the overall CPU can then be seen as a mechanical device. |
| 542 1# - | |
| -- | Attribution |
| 546 ## - LANGUAGE NOTE | |
| Language note | In English. |
| 588 0# - | |
| -- | Description based on online resource |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Science |
| Form subdivision | Textbooks |
| 710 2# - ADDED ENTRY--CORPORATE NAME | |
| Corporate name or jurisdiction name as entry element | Open Textbook Library |
| Relator term | distributor |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://open.umn.edu/opentextbooks/textbooks/593">https://open.umn.edu/opentextbooks/textbooks/593</a> |
| Public note | Access online version |
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